SemI40 Wafer Pattern Detection

Identifying critical deviation in the manufacturing process is an essential part to achieve a high quality of the products. In the domain of semiconductor manufacturing, so called wafer patterns allow to visually analyse the output of the rigorous electrical testing of the produced wafers. To support this task, algorithmic approaches are used to enhance the process of the pattern identification.

The demo represents a state-of-the-art approach to uncover latent patterns in wafer test data and has been designed to allow experts an better insight into the production quality. To achieve this task, a dedicated neural network has been developed and trained, namely a Deep Convolutional Variational Auto-Encoder (CVAE). This algorithmic approach is designed to remove uninformative variation in the data and to extract the underlying pattern signal. The algorithm also allows to generated new patterns based on the observations. The generated patterns can be controlled via two sliders. The combination of the two sliders then define what kind of pattern is being generated.